The MosChip MCS9250 PCI-to-PCI Bridge provides a high
performance connection path between two peripheral components
interconnect (PCI) buses. Transactions occur between
masters on one PCI bus and targets on another PCI bus,
and the MCS9250 allows bridged transactions to occur
concurrently on both buses. The bridge supports burst-mode
transfers to maximize data throughput, and the two bus
traffic paths through the bridge act independently.
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Two 32-bit,
33-MHz PCI buses |
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Fully compliant with PCI-to-PCI
Bridge Architecture Specification Revision 1.1
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Compliant with PCI Power Management
Interface Specification Revision 1.0
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3.3-V core logic with universal
PCI interface compatible with 3.3-V and 5-V PCI
signaling environments
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Provides
internal two-tier arbitration for up to four secondary
bus masters and supports an external secondary bus
arbiter |
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Secondary
bus is driven low during reset |
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Provides
five secondary PCI clock outputs |
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Burst data
transfers with pipeline architecture to maximize
data throughput in both directions |
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Provides
programmable extension windows and port decode options |
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Independent
read and write buffers for each direction |
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Packaged
in 160-pin LQFP and 176-pin LQFP |